Data processing systems, such as a System-on-a-Chip (SoC) may contain multiple processor cores, multiple data caches and shared data resources. In a shared memory system for example, each of the processor cores may read and write to a single shared address space. Cache coherency is an issue in any system that contains one or more caches and more than one device sharing data in a single cached area. There are two potential problems with system that contains caches. Firstly, memory may be updated (by another device) after a cached device has taken a copy. At this point, the data within the cache is out-of-date or invalid and no longer contains the most up-to-date data. Secondly, systems that contain write-back caches must deal with the case where the device writes to the local cached copy at which point the memory no longer contains the most up-to-date data. A second device reading memory will see out-of-date (stale) data.
Snoop filters, which monitor data transactions, may be used to ensure cache coherency.